From 87f472052c48d62a2e84ab66be1a74f5586be2da Mon Sep 17 00:00:00 2001 From: Rajaganesh Rathinasabapathi Date: Thu, 4 Jun 2026 11:44:16 +0000 Subject: [PATCH] arm64:dts:aspeed: Add Arthur BMC device tree Add aspeed-bmc-amd-arthur.dts for the AMD Arthur system and register the DTB in the aspeed Makefile. Tested: Verified in A2 Bahama Signed-off-by: Rajaganesh Rathinasabapathi --- arch/arm64/boot/dts/aspeed/Makefile | 1 + .../boot/dts/aspeed/aspeed-bmc-amd-arthur.dts | 454 ++++++++++++++++++ 2 files changed, 455 insertions(+) create mode 100644 arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-arthur.dts diff --git a/arch/arm64/boot/dts/aspeed/Makefile b/arch/arm64/boot/dts/aspeed/Makefile index 90b2a6b773b749..1e86c998d54054 100644 --- a/arch/arm64/boot/dts/aspeed/Makefile +++ b/arch/arm64/boot/dts/aspeed/Makefile @@ -11,3 +11,4 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-amd-nigeria.dtb \ aspeed-bmc-amd-nigerias3.dtb \ aspeed-bmc-amd-seagull.dtb \ + aspeed-bmc-amd-arthur.dtb \ diff --git a/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-arthur.dts b/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-arthur.dts new file mode 100644 index 00000000000000..ac097c5177078c --- /dev/null +++ b/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-arthur.dts @@ -0,0 +1,454 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2026 AMD Inc. +// Author: Rajaganesh Rathinasabapathi + +/dts-v1/; + +#include "aspeed-g7.dtsi" +#include "dt-bindings/gpio/aspeed-gpio.h" +#include +#include + +#define PCIE0_EP 1 // 1: EP, 0: RC +#define PCIE1_EP 1 // 1: EP, 0: RC +#define I3C_HUB + +/ { + model = "AMD Arthur VRB"; + compatible = "amd,arthur-bmc", "aspeed,ast2700"; + + chosen { + stdout-path = &uart12; + bootargs = "console=ttyS12,115200n8"; + }; + + firmware { + optee: optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + + memory@400000000 { + device_type = "memory"; + reg = <0x4 0x00000000 0x0 0x80000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + #include "ast2700-reserved-mem.dtsi" + + video_engine_memory0: video0 { + size = <0x0 0x04000000>; + alignment = <0x0 0x00010000>; + compatible = "shared-dma-pool"; + reusable; + }; + }; +}; + +&mdio0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; +}; + +&pinctrl1 { + pinctrl_rgmii0_driving: rgmii0_driving { + pins = "C20", "C19", "A8", "R14", "A7", "P14", + "D20", "A6", "B6", "N14", "B7", "B8"; + drive-strength = <1>; + }; +}; + +&mac0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii0_default &pinctrl_rgmii0_driving>; +}; + +&mac1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii1_default>; + clock-names = "MACCLK", "RCLK"; + phy-mode = "rmii"; + use-ncsi; +}; + +&fmc { + status = "okay"; + pinctrl-0 = <&pinctrl_fwspi_quad_default>; + pinctrl-names = "default"; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bmc"; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; +#include "amd-flash-layout-128.dtsi" + }; + + flash@1 { + status = "okay"; + m25p,fast-read; + label = "mpflash"; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + +&spi0 { + status = "okay"; + pinctrl-0 = <&pinctrl_spi0_default &pinctrl_spi0_cs1_default>; + pinctrl-names = "default"; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "pnor"; + spi-max-frequency = <33000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; + +&spi1 { + status = "okay"; + pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1_cs1_default>; + pinctrl-names = "default"; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "pnor"; + spi-max-frequency = <33000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; + +&spi2 { + status = "okay"; + pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2_cs1_default>; + pinctrl-names = "default"; + compatible = "aspeed,ast2700-spi-txrx"; + flash@0 { + reg = <0>; + status = "disabled"; + m25p,fast-read; + label = "pnor"; + compatible = "jedec,spi-nor"; + spi-max-frequency = <33000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; + oled@0 { + reg = <0>; + compatible = "ssd,ssd1322"; + spi-max-frequency = <1000000>; + label = "ssd1322"; + status = "okay"; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; + +&uart12 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; +}; + +&i2c7 { + status = "okay"; + clock-frequency = <400000>; + + scmeeprom@50 { + compatible = "atmel,24c08"; + reg = <0x50>; + }; +}; + +&i2c8 { + status = "okay"; + clock-frequency = <400000>; + + hpmeeprom@50 { + compatible = "microchip,24lc256", "atmel,24c256"; + reg = <0x50>; + }; +}; + +&i2c9 { + status = "okay"; +}; + +&i2c10 { + status = "okay"; +}; + +&i2c11 { + status = "okay"; +}; + +&i2c12 { + status = "okay"; +}; + +&i2c13 { + status = "okay"; +}; + +&i2c14 { + status = "okay"; +}; + +&i2c15 { + status = "okay"; +}; + +&i3c4 { + status = "okay"; + initial-role = "primary"; + internal-pullup = <2>; + i3c-scl-hz = <12500000>; + i2c-scl-hz = <1000000>; + mctp-controller; +}; + +#ifdef I3C_HUB + +#define JESD300_SPD_I3C_MODE(bus, index, addr) \ +spd_ ## bus ## _ ## index: spd@addr,4cc5118 ## index ## 000 { \ + reg = <0x ## addr 0x4cc 0x5118 ## index ## 000>; \ + assigned-address = <0x ## addr>; \ + dcr = /bits/ 8 <0xda>; \ + bcr = /bits/ 8 <0x6>; \ +} + +&i3c8 { + status = "okay"; + initial-role = "primary"; + bus-context = /bits/ 8 ; + internal-pullup = <2>; + i3c-scl-hz = <10000000>; + i2c-scl-hz = <1000000>; + + i3c_hub0: i3chub0@70,4CC00000000 { + reg = <0x70 0x4CC 0x00000000>; + assigned-address = <0x70>; + }; + + /* SB1 1P: 6 DIMMs on hub0 target ports 0-5 (0x50-0x55). */ + JESD300_SPD_I3C_MODE(0, 0, 50); + JESD300_SPD_I3C_MODE(0, 1, 51); + JESD300_SPD_I3C_MODE(0, 2, 52); + JESD300_SPD_I3C_MODE(0, 3, 53); + JESD300_SPD_I3C_MODE(0, 4, 54); + JESD300_SPD_I3C_MODE(0, 5, 55); +}; +#endif + +&gpio0 { + status = "okay"; + + p0_sec_i2c { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "SEL_P0_SEC_I2C_ROT_BMC"; + }; +}; + +<pi0 { + status = "okay"; +}; + +<pi0_gpio { + status = "okay"; + gpio-line-names = + /*00-07*/ "","","", + "P0_MGMT_ASSERT_CLR_CMOS","P0_MGMT_MON_PROCHOT_L","P0_MGMT_ASSERT_PROCHOT_L", + "P0_MGMT_MON_RSMRST_L","P0_ASSERT_RSMRST", + /*08-15*/ "P0_MGMT_MON_THERMTRIP_L","P0_MGMT_ASSERT_THERMTRIP_L","P0_PRESENT_L", + "","P1_PRESENT_L","", + "P0_MGMT_MON_POST_COMPLETE","", + /*16-23*/ "P0_MGMT_MON_PWR_GOOD","","P0_MGMT_MON_PSP_SOFT_FUSE_NTFY", + "","P0_I3C_APML_ALERT_L","", + "MGMT_SYS_MON_ATX_PWR_OK","", + /*24-31*/ "","","","","","","","P0_MGMT_ASSERT_NMI_BTN_L", + /*32-39*/ "","P0_MGMT_SOC_RESET_L","", + "MGMT_HDT_SEL","","SCM_JTAG_DBREQ","","JTAG_TRST_N", + /*40-47*/ "","P0_MGMT_ASSERT_WARM_RST_BTN_L","P0_MGMT_MON_DIMM_AH_PCAMP","","P0_MGMT_MON_DIMM_IP_PCAMP","","","", + /*48-55*/ "","","","","","","","", + /*56-63*/ "","","","","","","","", + /*64-71*/ "","","","","","","","", + /*72-79*/ "","","","","","","","", + /*80-87*/ "","","","","","","","", + /*88-95*/ "","","","","","","","", + /*96-103*/ "","","","","","","","", + /*104-111*/ "","","MGMT_MON_INTR_CHASSIS_L","","","HPM_STBY_EN","","", + /*112-119*/ "","","","","","","","", + /*120-127*/ "","","","","","","","", + /*128-135*/ "P0_MGMT_MON_RST_BTN_L","P0_MGMT_ASSERT_RST_BTN_L","P0_MGMT_MON_PWR_BTN_L", + "P0_MGMT_ASSERT_PWR_BTN_L","","", + "","", + /*136-143*/ "","","","","","","","", + /*144-151*/ "","","","","","","","", + /*152-159*/ "","","","","","","","", + /*160-167*/ "","","","","","","","", + /*168-175*/ "","","","","","","","", + /*176-183*/ "","","","","","","","", + /*184-191*/ "","","","","","","","", + /*192-199*/ "","","","","","","","", + /*200-207*/ "","","","","","","","", + /*208-215*/ "","","","","","","","", + /*216-223*/ "","","","","","","",""; +}; + +&video0 { + status = "okay"; + memory-region = <&video_engine_memory0>; +}; + +&espi0 { + status = "okay"; + perif-dma-mode; + perif-mmbi-enable; + perif-mmbi-src-addr = <0x0 0xa8000000>; + perif-mmbi-tgt-memory = <&espi0_mmbi_memory>; + perif-mmbi-instance-num = <0x1>; + perif-mcyc-enable; + perif-mcyc-src-addr = <0x0 0x98000000>; + perif-mcyc-size = <0x0 0x10000>; + oob-dma-mode; + flash-dma-mode; + flash-edaf-mode = <0>; + flash-edaf-tgt-addr = <0x1 0x80000000>; + flash-edaf-size = <0x0 0x2000000>; +}; + +&lpc0_pcc { + pcc-ports = <0x80>; + status = "okay"; +}; + +&uart13 { + /delete-property/ pinctrl-names; + /delete-property/ pinctrl-0; + status = "okay"; +}; + +&vuart0 { + status = "okay"; + virtual; + port = <0x3f8>; + sirq = <4>; + sirq-polarity = <0>; +}; + +&uphy3a { + status = "okay"; +}; + +&vhuba0 { + status = "okay"; + pinctrl-0 = <&pinctrl_usb2ahpd0_default>; +}; + +&usb3ahp { + status = "okay"; + pinctrl-0 = <&pinctrl_usb3axhp_default &pinctrl_usb2axhp_default>; +}; + +&xdma0 { + status = "okay"; + memory-region = <&xdma_memory0>; +}; + +&lpc0_kcs2 { + status = "okay"; + kcs-io-addr = <0xca2>; + kcs-channel = <2>; +}; + +&jtag1 { + status = "okay"; +}; + +&mctp0 { + status = "okay"; + memory-region = <&mctp0_reserved>; + mctp-controller; +}; + +&bmc_dev0 { + status = "okay"; + memory-region = <&bmc_dev0_memory>; +}; + +&emmc_controller { + status = "okay"; + mmc-hs200-1_8v; +}; + +&emmc { + status = "okay"; + bus-width = <4>; + pinctrl-0 = <&pinctrl_emmc_default>; + non-removable; + max-frequency = <200000000>; +}; + +&chassis { + status = "okay"; +}; + +/ { + alertl_sock0 { + compatible = "apml-alertl"; + status = "okay"; + socket-num = /bits/ 8 <0>; + gpios = <<pi0_gpio 20 GPIO_ACTIVE_LOW>; + }; +};